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authorFabian Mastenbroek <mail.fabianm@gmail.com>2020-10-04 17:55:26 +0200
committerFabian Mastenbroek <mail.fabianm@gmail.com>2020-10-04 22:24:00 +0200
commit8aaeb93e81fc3c4689d42747f87734fc4732d030 (patch)
treea83bde82f66b73fe58e65c66c36054f8e5543894 /simulator/opendc-compute/opendc-compute-simulator/src/test
parent47f803afc14a50c467d2f5f7ff406824428223f7 (diff)
Extract simulation-related code from OpenDC Compute (core)
This change splits the opendc-compute module into two modules: 1. opendc-compute-core The interfaces and APIs that represent a IaaS platform. 2. opendc-compute-simulator The implementation of these interfaces using simulation components from opendc-simulator-compute.
Diffstat (limited to 'simulator/opendc-compute/opendc-compute-simulator/src/test')
-rw-r--r--simulator/opendc-compute/opendc-compute-simulator/src/test/kotlin/org/opendc/compute/simulator/SimBareMetalDriverTest.kt89
-rw-r--r--simulator/opendc-compute/opendc-compute-simulator/src/test/kotlin/org/opendc/compute/simulator/SimProvisioningServiceTest.kt80
-rw-r--r--simulator/opendc-compute/opendc-compute-simulator/src/test/kotlin/org/opendc/compute/simulator/SimVirtDriverTest.kt145
3 files changed, 314 insertions, 0 deletions
diff --git a/simulator/opendc-compute/opendc-compute-simulator/src/test/kotlin/org/opendc/compute/simulator/SimBareMetalDriverTest.kt b/simulator/opendc-compute/opendc-compute-simulator/src/test/kotlin/org/opendc/compute/simulator/SimBareMetalDriverTest.kt
new file mode 100644
index 00000000..0f1bd444
--- /dev/null
+++ b/simulator/opendc-compute/opendc-compute-simulator/src/test/kotlin/org/opendc/compute/simulator/SimBareMetalDriverTest.kt
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2020 AtLarge Research
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+package org.opendc.compute.simulator
+
+import kotlinx.coroutines.ExperimentalCoroutinesApi
+import kotlinx.coroutines.flow.collect
+import kotlinx.coroutines.launch
+import kotlinx.coroutines.test.TestCoroutineScope
+import kotlinx.coroutines.withContext
+import org.junit.jupiter.api.Assertions.assertEquals
+import org.junit.jupiter.api.BeforeEach
+import org.junit.jupiter.api.Test
+import org.opendc.compute.core.ServerEvent
+import org.opendc.compute.core.ServerState
+import org.opendc.simulator.compute.SimMachineModel
+import org.opendc.simulator.compute.model.MemoryUnit
+import org.opendc.simulator.compute.model.ProcessingNode
+import org.opendc.simulator.compute.model.ProcessingUnit
+import org.opendc.simulator.compute.workload.SimFlopsWorkload
+import org.opendc.simulator.utils.DelayControllerClockAdapter
+import java.util.UUID
+
+@OptIn(ExperimentalCoroutinesApi::class)
+internal class SimBareMetalDriverTest {
+ private lateinit var machineModel: SimMachineModel
+
+ @BeforeEach
+ fun setUp() {
+ val cpuNode = ProcessingNode("Intel", "Xeon", "amd64", 4)
+
+ machineModel = SimMachineModel(
+ cpus = List(cpuNode.coreCount) { ProcessingUnit(cpuNode, it, 2000.0) },
+ memory = List(4) { MemoryUnit("Crucial", "MTA18ASF4G72AZ-3G2B1", 3200.0, 32_000) }
+ )
+ }
+
+ @Test
+ fun testFlopsWorkload() {
+ val testScope = TestCoroutineScope()
+ val clock = DelayControllerClockAdapter(testScope)
+
+ var finalState: ServerState = ServerState.BUILD
+ var finalTime = 0L
+
+ testScope.launch {
+ val driver = SimBareMetalDriver(this, clock, UUID.randomUUID(), "test", emptyMap(), machineModel)
+ val image = SimWorkloadImage(UUID.randomUUID(), "<unnamed>", emptyMap(), SimFlopsWorkload(4_000, 2, utilization = 1.0))
+
+ // Batch driver commands
+ withContext(coroutineContext) {
+ driver.init()
+ driver.setImage(image)
+ val server = driver.start().server!!
+ server.events.collect { event ->
+ when (event) {
+ is ServerEvent.StateChanged -> {
+ finalState = event.server.state
+ finalTime = clock.millis()
+ }
+ }
+ }
+ }
+ }
+
+ testScope.advanceUntilIdle()
+ assertEquals(ServerState.SHUTOFF, finalState)
+ assertEquals(1001, finalTime)
+ }
+}
diff --git a/simulator/opendc-compute/opendc-compute-simulator/src/test/kotlin/org/opendc/compute/simulator/SimProvisioningServiceTest.kt b/simulator/opendc-compute/opendc-compute-simulator/src/test/kotlin/org/opendc/compute/simulator/SimProvisioningServiceTest.kt
new file mode 100644
index 00000000..def78ce7
--- /dev/null
+++ b/simulator/opendc-compute/opendc-compute-simulator/src/test/kotlin/org/opendc/compute/simulator/SimProvisioningServiceTest.kt
@@ -0,0 +1,80 @@
+/*
+ * Copyright (c) 2020 AtLarge Research
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+package org.opendc.compute.simulator
+
+import kotlinx.coroutines.ExperimentalCoroutinesApi
+import kotlinx.coroutines.delay
+import kotlinx.coroutines.flow.collect
+import kotlinx.coroutines.launch
+import kotlinx.coroutines.test.TestCoroutineScope
+import org.junit.jupiter.api.BeforeEach
+import org.junit.jupiter.api.Test
+import org.opendc.compute.core.metal.service.SimpleProvisioningService
+import org.opendc.simulator.compute.SimMachineModel
+import org.opendc.simulator.compute.model.MemoryUnit
+import org.opendc.simulator.compute.model.ProcessingNode
+import org.opendc.simulator.compute.model.ProcessingUnit
+import org.opendc.simulator.compute.workload.SimFlopsWorkload
+import org.opendc.simulator.utils.DelayControllerClockAdapter
+import java.util.UUID
+
+/**
+ * Test suite for the [SimpleProvisioningService].
+ */
+@OptIn(ExperimentalCoroutinesApi::class)
+internal class SimProvisioningServiceTest {
+ private lateinit var machineModel: SimMachineModel
+
+ @BeforeEach
+ fun setUp() {
+ val cpuNode = ProcessingNode("Intel", "Xeon", "amd64", 4)
+
+ machineModel = SimMachineModel(
+ cpus = List(cpuNode.coreCount) { ProcessingUnit(cpuNode, it, 2000.0) },
+ memory = List(4) { MemoryUnit("Crucial", "MTA18ASF4G72AZ-3G2B1", 3200.0, 32_000) }
+ )
+ }
+
+ /**
+ * A basic smoke test.
+ */
+ @Test
+ fun testSmoke() {
+ val testScope = TestCoroutineScope()
+ val clock = DelayControllerClockAdapter(testScope)
+
+ testScope.launch {
+ val image = SimWorkloadImage(UUID.randomUUID(), "<unnamed>", emptyMap(), SimFlopsWorkload(1000, 2))
+ val driver = SimBareMetalDriver(this, clock, UUID.randomUUID(), "test", emptyMap(), machineModel)
+
+ val provisioner = SimpleProvisioningService()
+ provisioner.create(driver)
+ delay(5)
+ val nodes = provisioner.nodes()
+ val node = provisioner.deploy(nodes.first(), image)
+ node.server!!.events.collect { println(it) }
+ }
+
+ testScope.advanceUntilIdle()
+ }
+}
diff --git a/simulator/opendc-compute/opendc-compute-simulator/src/test/kotlin/org/opendc/compute/simulator/SimVirtDriverTest.kt b/simulator/opendc-compute/opendc-compute-simulator/src/test/kotlin/org/opendc/compute/simulator/SimVirtDriverTest.kt
new file mode 100644
index 00000000..a0c61f29
--- /dev/null
+++ b/simulator/opendc-compute/opendc-compute-simulator/src/test/kotlin/org/opendc/compute/simulator/SimVirtDriverTest.kt
@@ -0,0 +1,145 @@
+/*
+ * Copyright (c) 2020 AtLarge Research
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+package org.opendc.compute.simulator
+
+import kotlinx.coroutines.ExperimentalCoroutinesApi
+import kotlinx.coroutines.delay
+import kotlinx.coroutines.flow.launchIn
+import kotlinx.coroutines.flow.onEach
+import kotlinx.coroutines.launch
+import kotlinx.coroutines.test.TestCoroutineScope
+import org.junit.jupiter.api.Assertions.assertEquals
+import org.junit.jupiter.api.BeforeEach
+import org.junit.jupiter.api.Test
+import org.junit.jupiter.api.assertAll
+import org.opendc.compute.core.Flavor
+import org.opendc.compute.core.virt.HypervisorEvent
+import org.opendc.simulator.compute.SimMachineModel
+import org.opendc.simulator.compute.model.MemoryUnit
+import org.opendc.simulator.compute.model.ProcessingNode
+import org.opendc.simulator.compute.model.ProcessingUnit
+import org.opendc.simulator.compute.workload.SimTraceWorkload
+import org.opendc.simulator.utils.DelayControllerClockAdapter
+import java.time.Clock
+import java.util.UUID
+
+/**
+ * Basic test-suite for the hypervisor.
+ */
+@OptIn(ExperimentalCoroutinesApi::class)
+internal class SimVirtDriverTest {
+ private lateinit var scope: TestCoroutineScope
+ private lateinit var clock: Clock
+ private lateinit var machineModel: SimMachineModel
+
+ @BeforeEach
+ fun setUp() {
+ scope = TestCoroutineScope()
+ clock = DelayControllerClockAdapter(scope)
+
+ val cpuNode = ProcessingNode("Intel", "Xeon", "amd64", 2)
+
+ machineModel = SimMachineModel(
+ cpus = List(cpuNode.coreCount) { ProcessingUnit(cpuNode, it, 3200.0) },
+ memory = List(4) { MemoryUnit("Crucial", "MTA18ASF4G72AZ-3G2B1", 3200.0, 32_000) }
+ )
+ }
+
+ /**
+ * Test overcommissioning of a hypervisor.
+ */
+ @Test
+ fun overcommission() {
+ var requestedBurst = 0L
+ var grantedBurst = 0L
+ var overcommissionedBurst = 0L
+
+ scope.launch {
+ val virtDriverWorkload = SimVirtDriverWorkload()
+ val vmm = SimWorkloadImage(UUID.randomUUID(), "vmm", emptyMap(), virtDriverWorkload)
+ val duration = 5 * 60L
+ val vmImageA = SimWorkloadImage(
+ UUID.randomUUID(),
+ "<unnamed>",
+ emptyMap(),
+ SimTraceWorkload(
+ sequenceOf(
+ SimTraceWorkload.Fragment(0, 28L * duration, duration * 1000, 28.0, 2),
+ SimTraceWorkload.Fragment(0, 3500L * duration, duration * 1000, 3500.0, 2),
+ SimTraceWorkload.Fragment(0, 0, duration * 1000, 0.0, 2),
+ SimTraceWorkload.Fragment(0, 183L * duration, duration * 1000, 183.0, 2)
+ ),
+ )
+ )
+ val vmImageB = SimWorkloadImage(
+ UUID.randomUUID(),
+ "<unnamed>",
+ emptyMap(),
+ SimTraceWorkload(
+ sequenceOf(
+ SimTraceWorkload.Fragment(0, 28L * duration, duration * 1000, 28.0, 2),
+ SimTraceWorkload.Fragment(0, 3100L * duration, duration * 1000, 3100.0, 2),
+ SimTraceWorkload.Fragment(0, 0, duration * 1000, 0.0, 2),
+ SimTraceWorkload.Fragment(0, 73L * duration, duration * 1000, 73.0, 2)
+ )
+ ),
+ )
+
+ val metalDriver =
+ SimBareMetalDriver(this, clock, UUID.randomUUID(), "test", emptyMap(), machineModel)
+
+ metalDriver.init()
+ metalDriver.setImage(vmm)
+ metalDriver.start()
+
+ delay(5)
+
+ val flavor = Flavor(2, 0)
+ val vmDriver = virtDriverWorkload.driver
+ vmDriver.events
+ .onEach { event ->
+ when (event) {
+ is HypervisorEvent.SliceFinished -> {
+ requestedBurst += event.requestedBurst
+ grantedBurst += event.grantedBurst
+ overcommissionedBurst += event.overcommissionedBurst
+ }
+ }
+ }
+ .launchIn(this)
+
+ vmDriver.spawn("a", vmImageA, flavor)
+ vmDriver.spawn("b", vmImageB, flavor)
+ }
+
+ scope.advanceUntilIdle()
+
+ assertAll(
+ { assertEquals(emptyList<Throwable>(), scope.uncaughtExceptions, "No errors") },
+ { assertEquals(2073600, requestedBurst, "Requested Burst does not match") },
+ { assertEquals(2013600, grantedBurst, "Granted Burst does not match") },
+ { assertEquals(60000, overcommissionedBurst, "Overcommissioned Burst does not match") },
+ { assertEquals(1200007, scope.currentTime) }
+ )
+ }
+}