diff options
| author | Fabian Mastenbroek <mail.fabianm@gmail.com> | 2021-03-22 16:45:13 +0100 |
|---|---|---|
| committer | Fabian Mastenbroek <mail.fabianm@gmail.com> | 2021-03-22 18:16:40 +0100 |
| commit | 3718c385f84b463ac799080bb5603e0011adcd7d (patch) | |
| tree | 414e4c9fa82ade602cfdae4384f39b0bdb6cb139 /simulator/opendc-compute/opendc-compute-simulator/src/main | |
| parent | f616b720406250b1415593ff04c9d910b1fda54c (diff) | |
simulator: Remove generic resource constraint from resource model
This change removes the generic resource constraint (e.g., SimResource)
and replaces it by a simple capacity property. In the future, users
should handle the resource properties on a higher level.
This change simplifies compositions of consumers and providers by not
requiring a translation from resource to capacity.
Diffstat (limited to 'simulator/opendc-compute/opendc-compute-simulator/src/main')
| -rw-r--r-- | simulator/opendc-compute/opendc-compute-simulator/src/main/kotlin/org/opendc/compute/simulator/SimHost.kt | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/simulator/opendc-compute/opendc-compute-simulator/src/main/kotlin/org/opendc/compute/simulator/SimHost.kt b/simulator/opendc-compute/opendc-compute-simulator/src/main/kotlin/org/opendc/compute/simulator/SimHost.kt index 6e9b8151..694676bc 100644 --- a/simulator/opendc-compute/opendc-compute-simulator/src/main/kotlin/org/opendc/compute/simulator/SimHost.kt +++ b/simulator/opendc-compute/opendc-compute-simulator/src/main/kotlin/org/opendc/compute/simulator/SimHost.kt @@ -35,7 +35,7 @@ import org.opendc.compute.simulator.power.models.ConstantPowerModel import org.opendc.simulator.compute.* import org.opendc.simulator.compute.interference.IMAGE_PERF_INTERFERENCE_MODEL import org.opendc.simulator.compute.interference.PerformanceInterferenceModel -import org.opendc.simulator.compute.model.SimMemoryUnit +import org.opendc.simulator.compute.model.MemoryUnit import org.opendc.simulator.failures.FailureDomain import org.opendc.utils.flow.EventFlow import java.time.Clock @@ -217,7 +217,7 @@ public class SimHost( val originalCpu = machine.model.cpus[0] val processingNode = originalCpu.node.copy(coreCount = cpuCount) val processingUnits = (0 until cpuCount).map { originalCpu.copy(id = it, node = processingNode) } - val memoryUnits = listOf(SimMemoryUnit("Generic", "Generic", 3200.0, memorySize)) + val memoryUnits = listOf(MemoryUnit("Generic", "Generic", 3200.0, memorySize)) return SimMachineModel(processingUnits, memoryUnits) } |