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authorFabian Mastenbroek <mail.fabianm@gmail.com>2022-09-22 11:12:01 +0200
committerFabian Mastenbroek <mail.fabianm@gmail.com>2022-09-22 14:49:37 +0200
commit8b6c15193281171bcb2e111f339ffb8da385332b (patch)
tree959be1b2134af3e947b6b1a172d9b09ebc0c4fbc /opendc-simulator/opendc-simulator-compute/src
parent21270e0b4250bd6927e85227fa825cf8ed59aaed (diff)
refactor(compute): Simplify constructor of SimHost
This change updates the constructor of SimHost to receive a `SimBareMetalMachine` and `SimHypervisor` directly instead of construction these objects itself. This ensures better testability and also simplifies the constructor of this class, especially when future changes to `SimBareMetalMachine` or `SimHypervisor` change their constructors.
Diffstat (limited to 'opendc-simulator/opendc-simulator-compute/src')
-rw-r--r--opendc-simulator/opendc-simulator-compute/src/main/kotlin/org/opendc/simulator/compute/model/MachineModel.kt18
1 files changed, 17 insertions, 1 deletions
diff --git a/opendc-simulator/opendc-simulator-compute/src/main/kotlin/org/opendc/simulator/compute/model/MachineModel.kt b/opendc-simulator/opendc-simulator-compute/src/main/kotlin/org/opendc/simulator/compute/model/MachineModel.kt
index 7e4d7191..22dcaef4 100644
--- a/opendc-simulator/opendc-simulator-compute/src/main/kotlin/org/opendc/simulator/compute/model/MachineModel.kt
+++ b/opendc-simulator/opendc-simulator-compute/src/main/kotlin/org/opendc/simulator/compute/model/MachineModel.kt
@@ -35,4 +35,20 @@ public data class MachineModel(
public val memory: List<MemoryUnit>,
public val net: List<NetworkAdapter> = emptyList(),
public val storage: List<StorageDevice> = emptyList()
-)
+) {
+ /**
+ * Optimize the [MachineModel] by merging all resources of the same type into a single resource with the combined
+ * capacity. Such configurations can be simulated more efficiently by OpenDC.
+ */
+ public fun optimize(): MachineModel {
+ val originalCpu = cpus[0]
+ val freq = cpus.sumOf { it.frequency }
+ val processingNode = originalCpu.node.copy(coreCount = 1)
+ val processingUnits = listOf(originalCpu.copy(frequency = freq, node = processingNode))
+
+ val memorySize = memory.sumOf { it.size }
+ val memoryUnits = listOf(MemoryUnit("Generic", "Generic", 3200.0, memorySize))
+
+ return MachineModel(processingUnits, memoryUnits)
+ }
+}