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authorFabian Mastenbroek <mail.fabianm@gmail.com>2022-09-05 20:23:45 +0200
committerFabian Mastenbroek <mail.fabianm@gmail.com>2022-09-21 11:31:15 +0200
commit35ec0060fb73149e687655851a682f12486f0086 (patch)
tree8e6a4f5e14b00584d4054e3a21dc27ddda745b44 /opendc-simulator/opendc-simulator-compute/src/test/kotlin/org
parent2ec5e8f1e44239916779655d4d68a9c6dae8e894 (diff)
refactor(sim/compute): Move interference logic into VmInterferenceMember
This change updates the design of the VM interference model, where we move more of the logic into the `VmInterferenceMember` interface. This removes the dependency on the `VmInterferenceModel` for the hypervisor interface.
Diffstat (limited to 'opendc-simulator/opendc-simulator-compute/src/test/kotlin/org')
-rw-r--r--opendc-simulator/opendc-simulator-compute/src/test/kotlin/org/opendc/simulator/compute/kernel/SimFairShareHypervisorTest.kt12
1 files changed, 6 insertions, 6 deletions
diff --git a/opendc-simulator/opendc-simulator-compute/src/test/kotlin/org/opendc/simulator/compute/kernel/SimFairShareHypervisorTest.kt b/opendc-simulator/opendc-simulator-compute/src/test/kotlin/org/opendc/simulator/compute/kernel/SimFairShareHypervisorTest.kt
index ab2a6d76..15d32002 100644
--- a/opendc-simulator/opendc-simulator-compute/src/test/kotlin/org/opendc/simulator/compute/kernel/SimFairShareHypervisorTest.kt
+++ b/opendc-simulator/opendc-simulator-compute/src/test/kotlin/org/opendc/simulator/compute/kernel/SimFairShareHypervisorTest.kt
@@ -77,7 +77,7 @@ internal class SimFairShareHypervisorTest {
val platform = FlowEngine(coroutineContext, clock)
val machine = SimBareMetalMachine(platform, model, SimplePowerDriver(ConstantPowerModel(0.0)))
- val hypervisor = SimFairShareHypervisor(platform, PerformanceScalingGovernor(), null)
+ val hypervisor = SimFairShareHypervisor(platform, PerformanceScalingGovernor())
launch {
machine.runWorkload(hypervisor)
@@ -128,7 +128,7 @@ internal class SimFairShareHypervisorTest {
val machine = SimBareMetalMachine(
platform, model, SimplePowerDriver(ConstantPowerModel(0.0))
)
- val hypervisor = SimFairShareHypervisor(platform, null, null)
+ val hypervisor = SimFairShareHypervisor(platform, null)
launch {
machine.runWorkload(hypervisor)
@@ -167,7 +167,7 @@ internal class SimFairShareHypervisorTest {
val platform = FlowEngine(coroutineContext, clock)
val machine = SimBareMetalMachine(platform, model, SimplePowerDriver(ConstantPowerModel(0.0)))
- val hypervisor = SimFairShareHypervisor(platform, null, null)
+ val hypervisor = SimFairShareHypervisor(platform, null)
assertDoesNotThrow {
launch {
@@ -197,7 +197,7 @@ internal class SimFairShareHypervisorTest {
val machine = SimBareMetalMachine(
platform, model, SimplePowerDriver(ConstantPowerModel(0.0))
)
- val hypervisor = SimFairShareHypervisor(platform, null, interferenceDomain)
+ val hypervisor = SimFairShareHypervisor(platform, null)
val duration = 5 * 60L
val workloadA =
@@ -225,11 +225,11 @@ internal class SimFairShareHypervisorTest {
coroutineScope {
launch {
- val vm = hypervisor.newMachine(model, interferenceDomain.createKey("a"))
+ val vm = hypervisor.newMachine(model, interferenceDomain.getMember("a"))
vm.runWorkload(workloadA)
hypervisor.removeMachine(vm)
}
- val vm = hypervisor.newMachine(model, interferenceDomain.createKey("b"))
+ val vm = hypervisor.newMachine(model, interferenceDomain.getMember("b"))
vm.runWorkload(workloadB)
hypervisor.removeMachine(vm)
}