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authorFabian Mastenbroek <mail.fabianm@gmail.com>2021-06-21 20:57:06 +0200
committerFabian Mastenbroek <mail.fabianm@gmail.com>2021-06-21 20:57:06 +0200
commitb29f90e5ad5bcac29cde86e56c06e0b65a52cedc (patch)
tree4483016fd06b44edb57ed5d96344c2933452fdb8 /opendc-faas/opendc-faas-simulator/src/test
parentf28cc9964ad1ca1c074331ed54053d469e7373e5 (diff)
simulator: Re-organize compute simulator module
This change re-organizes the classes of the compute simulator module to make a clearer distinction between the hardware, firmware and software interfaces in this module.
Diffstat (limited to 'opendc-faas/opendc-faas-simulator/src/test')
-rw-r--r--opendc-faas/opendc-faas-simulator/src/test/kotlin/org/opendc/faas/simulator/SimFaaSServiceTest.kt6
1 files changed, 3 insertions, 3 deletions
diff --git a/opendc-faas/opendc-faas-simulator/src/test/kotlin/org/opendc/faas/simulator/SimFaaSServiceTest.kt b/opendc-faas/opendc-faas-simulator/src/test/kotlin/org/opendc/faas/simulator/SimFaaSServiceTest.kt
index ceb91e75..64f2551b 100644
--- a/opendc-faas/opendc-faas-simulator/src/test/kotlin/org/opendc/faas/simulator/SimFaaSServiceTest.kt
+++ b/opendc-faas/opendc-faas-simulator/src/test/kotlin/org/opendc/faas/simulator/SimFaaSServiceTest.kt
@@ -36,7 +36,7 @@ import org.opendc.faas.service.autoscaler.FunctionTerminationPolicyFixed
import org.opendc.faas.service.router.RandomRoutingPolicy
import org.opendc.faas.simulator.delay.ZeroDelayInjector
import org.opendc.faas.simulator.workload.SimFaaSWorkload
-import org.opendc.simulator.compute.SimMachineModel
+import org.opendc.simulator.compute.model.MachineModel
import org.opendc.simulator.compute.model.MemoryUnit
import org.opendc.simulator.compute.model.ProcessingNode
import org.opendc.simulator.compute.model.ProcessingUnit
@@ -50,13 +50,13 @@ import org.opendc.simulator.core.runBlockingSimulation
@OptIn(ExperimentalCoroutinesApi::class)
internal class SimFaaSServiceTest {
- private lateinit var machineModel: SimMachineModel
+ private lateinit var machineModel: MachineModel
@BeforeEach
fun setUp() {
val cpuNode = ProcessingNode("Intel", "Xeon", "amd64", 2)
- machineModel = SimMachineModel(
+ machineModel = MachineModel(
cpus = List(cpuNode.coreCount) { ProcessingUnit(cpuNode, it, 1000.0) },
memory = List(4) { MemoryUnit("Crucial", "MTA18ASF4G72AZ-3G2B1", 3200.0, 32_000) }
)