summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorGeorgios Andreadis <info@gandreadis.com>2020-05-19 21:28:15 +0200
committerGeorgios Andreadis <info@gandreadis.com>2020-05-20 16:02:42 +0200
commit57d02e62a66534146b90a8e66e18609da495ba67 (patch)
treed1907254688cbba7f9c5210a07db0df909bf08da
parent294d6d5e5ce9fdc68f98434b3c7f1dc970c06647 (diff)
Fix sampling issue
-rw-r--r--opendc/opendc-experiments-sc20/src/main/kotlin/com/atlarge/opendc/experiments/sc20/trace/WorkloadSampler.kt13
1 files changed, 9 insertions, 4 deletions
diff --git a/opendc/opendc-experiments-sc20/src/main/kotlin/com/atlarge/opendc/experiments/sc20/trace/WorkloadSampler.kt b/opendc/opendc-experiments-sc20/src/main/kotlin/com/atlarge/opendc/experiments/sc20/trace/WorkloadSampler.kt
index 589854b6..dd70d4f1 100644
--- a/opendc/opendc-experiments-sc20/src/main/kotlin/com/atlarge/opendc/experiments/sc20/trace/WorkloadSampler.kt
+++ b/opendc/opendc-experiments-sc20/src/main/kotlin/com/atlarge/opendc/experiments/sc20/trace/WorkloadSampler.kt
@@ -43,17 +43,22 @@ fun sampleWorkload(
seed: Int
): List<TraceEntry<VmWorkload>> {
return if (workload is CompositeWorkload) {
- sampleRegularWorkload(trace, subWorkload, seed)
+ sampleRegularWorkload(trace, workload, subWorkload, seed)
} else {
- sampleRegularWorkload(trace, workload, seed)
+ sampleRegularWorkload(trace, workload, workload, seed)
}
}
/**
* Sample a regular (non-HPC) workload.
*/
-fun sampleRegularWorkload(trace: List<TraceEntry<VmWorkload>>, workload: Workload, seed: Int): List<TraceEntry<VmWorkload>> {
- val fraction = workload.fraction
+fun sampleRegularWorkload(
+ trace: List<TraceEntry<VmWorkload>>,
+ workload: Workload,
+ subWorkload: Workload,
+ seed: Int
+): List<TraceEntry<VmWorkload>> {
+ val fraction = subWorkload.fraction
val shuffled = trace.shuffled(Random(seed))
val res = mutableListOf<TraceEntry<VmWorkload>>()