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\begin{frame}\frametitle{Motivation}
\begin{tcolorbox}[title=Context]
- Heterogeneous datacenter architectures are common~\cite{DBLP:conf/date/MilojicicFDR21} due to the end of Dennard's scaling~\cite{DBLP:image/48Microprocessor/Rupp}.
+ Heterogeneous datacenter architectures are common ~\cite{DBLP:conf/date/MilojicicFDR21} due to the end of Dennard's scaling~\cite{DBLP:image/48Microprocessor/Rupp}.
Today, computational needs of AI drive managers to diversify datacenters even more~\cite{DBLP:journals/computer/AthavaleBBMMPS24}.
In result datacenters become extremely complex and hard to operate.
\end{tcolorbox}
\begin{minipage}[t]{0.45\linewidth}
\tiny
- {\centering
- \includegraphics[width=1.05\linewidth]{images/48-years-processor-trend-2.pdf}
- }
- \textbf{Figure 1.1:} 48 years of microprocessor trend data. Legend: \textcolor{Orange}{$\bigblacktriangleup$ Transistors (thousands)}, \textcolor{Blue}{$\lgblkcircle$ Single Thread Performance (SpecINT $\times 10^3$)}, \textcolor{Green}{$\lgblksquare$ Frequency (MHz)}, \textcolor{Maroon}{$\bigblacktriangledown$ Typical Power (Watts)}, $\mdlgblkdiamond$ Number of Logical Cores~\cite{DBLP:image/48Microprocessor/Rupp}.
+ \begin{center}
+ \includegraphics[width=0.7\linewidth]{images/nvidiagpu.png}
+ \end{center}
+ \vspace{-0.2cm}
+ \textbf{Figure 1.1:} Nvidia Ada Lovelace AD102 Architecture, present in all GPUs from 2022 onwards~\cite{Wikipedia:AdaLovelaceArchi}.
+ Source: official renderings by Nvidia.
+ %\textbf{Figure 1.1:} 48 years of microprocessor trend data. Legend: \textcolor{Orange}{$\bigblacktriangleup$ Transistors (thousands)}, \textcolor{Blue}{$\lgblkcircle$ Single Thread Performance (SpecINT $\times 10^3$)}, \textcolor{Green}{$\lgblksquare$ Frequency (MHz)}, \textcolor{Maroon}{$\bigblacktriangledown$ Typical Power (Watts)}, $\mdlgblkdiamond$ Number of Logical Cores~\cite{DBLP:image/48Microprocessor/Rupp}.
\end{minipage}
\hspace{0.5cm}
\begin{minipage}[t]{0.45\linewidth}