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* Fixed a problem which caused the CPU limit to be much lower than it should be.
AllocationPolicy is now properly exposed to the user
* Fixed tests
* spotless kotlin
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* Updated the power models and added tests
* Updated test topologies
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* sync with the master branch
* rebase
* multimodel - simulation is currently run as many times as you can see a model
* factory method - handles models without given params
* removed redundant flags
* modelType
* flags removed
* implemented output into a folder
* multimodel ipynb setup - to be implemented and also ran as a python script, when the simulation occurs
* towards a mutimodel python implementation - issue observed - the saved files have same data?
* json parsing handles now lists for topology, workloads, allocaitonPolicies, powerModels
* scenarioFile inputs lists, and creates multiple combinations of scenarios
* multi-model prediction repaired, now we predict using multiple models
* commit before removing powerModel from scenario
* commit after removing powerModel from scenario
* commit after removing powerModel from scenario (and actually running)
* powermodels now can output their name and full name (with min and max)
* now we can select where to output (seed or output folder)
* input files - clear naming + output naming improved
* minimal changes
* all tests passing + json files from tests updated to the new json format
* json files from topology now accept only one power model (instead of list)
* json files from topology now accept only one power model (instead of list)
* multi and single input from tests updated to match the format
* tests passed locally
* spotless applies
* demo folder removed
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* Updated the topology format to JSON. Updated TopologyReader.kt to handle JSON filed. Added documentation for the new format.
* applied spotless kotlin
* small update
* Updated for spotless apply
* Updated for spotless apply
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* Updated all package versions including kotlin. Updated all web-server tests to run.
* Changed the java version of the tests. OpenDC now only supports java 19.
* small update
* test update
* new update
* updated docker version to 19
* updated docker version to 19
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* Updated metrics and parquet output
* fixed typos
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* made sure all tests run
* fixed typo
* executed spotlessApply
* added back web-server tests
* updated SimTraceWorkloadTest
* commented CapelinRunneer and GreenifierRunner tests
* commented one SimTraceWorkloadTest
* altered codecov execution
* changed codecov
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This change replaces the use of `CoroutineContext` for passing the
`SimulationDispatcher` across the different modules of OpenDC by the
lightweight `Dispatcher` interface of the OpenDC common module.
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This change updates the `SimulationScheduler` class to implement the
`Dispatcher` interface from the OpenDC Common module, so that OpenDC
modules only need to depend on the common module for dispatching future
task (possibly in simulation).
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This change updates the modules of OpenDC to always accept
the `InstantSource` interface as source of time. Previously we used
`java.time.Clock`, but this class is bound to a time zone which does not
make sense for our use-cases.
Since `java.time.Clock` implements `java.time.InstantSource`, it can be
used in places that require an `InstantSource` as parameter. Conversion
from `InstantSource` to `Clock` is also possible by invoking
`InstantSource#withZone`.
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This change updates the interface of `SimWorkload` to support
snapshotting workloads. We introduce a new method `snapshot()` to this
interface which returns a new `SimWorkload` that can be started at a
later point in time and on another `SimMachine`, which continues
progress from the moment the workload was snapshotted.
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This change updates the implementation of `SimMachineContext` to report
exceptions thrown in `onStop` as suppressed exceptions if an exception
caused the workload to stop.
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This change adds a new static method `chain` to `SimWorkloads` to chain
multiple workloads sequentially.
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This change updates the interface of `SimMachineContext` to allow
workloads to reset all resources provided by the machine to the
workload. This allows us to implement a `SimWorkload` that can compose
multiple workloads.
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This change introduces a new class SimWorkloads which provides
construction methods for the standard workloads available in OpenDC.
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This change updates the interface of `SimMachine#startWorkload` to
introduce a parameter `completion` that is invoked when the workload
completes either succesfully or due to failure.
This functionality has often been implemented by wrapping a
`SimWorkload` and catching its exceptions. However, since this
functionality is used in all usages of `SimMachine#startWorkload` we
instead embed it into `SimMachine` itself.
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This change updates the workload implementation of SimTrace by
introducing multiple implementations of the FlowStageLogic interface,
which is selected dynamically when the workload starts.
This change helps eliminate the unecessary division (and memory fetch)
when running a workload with just a single CPU.
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This change re-implements the OpenDC compute simulator framework using
the new flow2 framework for modelling multi-edge flow networks. The
re-implementation is written in Java and focusses on performance and
clean API surface.
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This change updates the build configuration to use Spotless for code
formating of both Kotlin and Java.
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This change updates the repository to remove the use of wildcard imports
everywhere. Wildcard imports are not allowed by default by Ktlint as
well as Google's Java style guide.
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This change renames the method `runBlockingSimulation` to
`runSimulation` to put more emphasis on the simulation part of the
method. The blocking part is not that important, but this behavior is
still described in the method documentation.
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This change updates the implementation of `SimulationDispatcher` to use
a (possibly user-provided) `SimulationScheduler` for managing the
execution of the simulation and future tasks.
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This change simplifies the SimHypervisor class into a single
implementation. Previously, it was implemented as an abstract class with
multiple implementations for each multiplexer type. We now pass the
multiplexer type as parameter to the SimHypervisor constructor.
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This change updates the virtual machine performance interference model
so that the interference domain can be constructed independently of the
interference profile. As a consequence, the construction of the topology
now does not depend anymore on the interference profile.
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This change updates the constructor of SimHost to receive a
`SimBareMetalMachine` and `SimHypervisor` directly instead of
construction these objects itself. This ensures better testability and
also simplifies the constructor of this class, especially when future
changes to `SimBareMetalMachine` or `SimHypervisor` change their
constructors.
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This change moves the Random dependency outside the interference model,
to allow the interference model to be completely immutable and passable
between different simulations.
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This change updates the performance interference algorithm to remove the
boxing that happened due to using a generic collection for storing
integers. This collection was accessed in the algorithm's hot path, so
could cause slowdown.
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This change updates the design of the VM interference model, where we
move more of the logic into the `VmInterferenceMember` interface. This
removes the dependency on the `VmInterferenceModel` for the hypervisor
interface.
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This change updates the signature of the `SimHypervisor` interface to
accept a `VmInterferenceKey` when creating a new virtual machine,
instead of providing a string identifier. This is in preparation for
removing the dependency on the `VmInterferenceModel` in the
`SimAbstractHypervisor` class.
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This change removes the timestamp parameter from `SimTrace`. Instead, it
is now assumed that the trace is continuous and the end of a fragment
starts a new fragment, in order to simplify replaying of the trace.
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This change removes the reference to the active FlowEngine from the
SimMachineContext interface. This prevents leaking the lower layer into
this module.
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This change removes the convergence listener parameter in for the
`SimBareMetalMachine` and the hypervisors. This parameter was not used
in the code-base and is being removed with the introduction of the new
flow2 module.
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This change moves the core of the VM interference model from the flow
module into the compute simulator. This logic can be contained in the
compute simulator and does not need to leak into the flow-level
simulator.
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This change fixes an issue in the `SimBareMetalMachine` implementation
where the power usage was only updated after a non-zero duration. However,
this would mean that OpenDC would possibly report incorrect power usage
values when multiple convergence calls occured at the same timestamp.
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This change fixes an issue where the `SimTrace.Builder` would quickly
allocate too much memory when constructing a trace, due to doubling the
array sizes each time. Instead, we use the approach used by `ArrayList`,
where we increase the array size by 50% every step.
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This change updates the Gradle build configuration to ensure that all
library modules (that will be published) use testing and are included in
coverage reports. This should ensure the public modules remain well
tested.
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This change removes the delta parameter from the callbacks of the flow
framework. This parameter was used to indicate the duration in time
between the last call and the current call. However, its usefulness was
limited since the actual delta values needed by implementors of this
method had to be bridged across different flow callbacks.
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This change updates the simulator implementation to flush the active
progress when accessing the hypervisor counters. Previously, if the
counters were accessed, while the mux or consumer was in progress, its
counter values were not accurate.
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This change removes the opendc-platform module from the project. This
module represented a Java platform which was previously used for sharing
a set of dependency versions between subprojects. However, with the
version catalogue that was added by Gradle, we currently do not use the
platform anymore.
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This change addresses an issue with the SimSpaceSharedHypervisor
implementation where it did not emit convergence events due to missing
implementation. This caused issues with users of this class trying to
obtain usage data, which depended on these events being emitted.
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This change updates the implementation of the trace converter and
SimTrace implementation to support cases where there is a gap between
samples in the trace data.
This change allows users to specify what to do in case samples are
missing in the trace. The available options are specified in
`SimTrace.FillMode`. Currently, we support either carrying the previous
value forward or set the usage to zero.
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This change updates the SimMachine interface to drop the coroutine
requirement for running a workload on a machines. Users can now
asynchronously start a workload and receive notifications via the
workload callbacks.
Users still have the possibility to suspend execution during workload
execution by using the new `runWorkload` method, which is implemented on
top of the new `startWorkload` primitive.
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This change fixes an issue with the FlowMultiplexer implementation where
the capacity of each flow input was equal to the capacity of all flow
outputs. Now, the user can specify the capacity of the input, which will
be used to correctly compute the active and idle time.
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This change redesigns the virtual machine interference algorithm to have
a fixed memory usage per `VmInterferenceModel` instance. Previously, for
every interference domain, a copy of the model would be created, leading
to OutOfMemory errors when running multiple experiments at the same
time.
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This change addresses an issue where energy usage was not computed
correctly if the machine performed no work in between collection cycles.
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This change updates the SimAbstractHypervisor and MaxMinFlowMultiplexer
to count interference of multiplexer inputs, instead of only counting
them for the scheduler as a whole.
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This change improves the performance of the SimTraceWorkload class by
changing the way trace fragments are read and processed by the CPU
consumers.
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