1 files changed, 16 insertions, 11 deletions
diff --git a/simulator/opendc-experiments/opendc-experiments-sc20/src/test/kotlin/org/opendc/experiments/sc20/Sc20IntegrationTest.kt b/simulator/opendc-experiments/opendc-experiments-sc20/src/test/kotlin/org/opendc/experiments/sc20/Sc20IntegrationTest.kt
index 9c44edfc..c5ad345d 100644
--- a/simulator/opendc-experiments/opendc-experiments-sc20/src/test/kotlin/org/opendc/experiments/sc20/Sc20IntegrationTest.kt
+++ b/simulator/opendc-experiments/opendc-experiments-sc20/src/test/kotlin/org/opendc/experiments/sc20/Sc20IntegrationTest.kt
@@ -48,6 +48,7 @@ import org.opendc.format.environment.EnvironmentReader
 import org.opendc.format.environment.sc20.Sc20ClusterEnvironmentReader
 import org.opendc.format.trace.TraceReader
 import org.opendc.simulator.utils.DelayControllerClockAdapter
+import org.opendc.trace.core.EventTracer
 import java.io.File
 import java.time.Clock
 
@@ -89,7 +90,7 @@ class Sc20IntegrationTest {
     fun tearDown() = testScope.cleanupTestCoroutines()
 
     @Test
-    fun smoke() {
+    fun testLarge() {
         val failures = false
         val seed = 0
         val chan = Channel<Unit>(Channel.CONFLATED)
@@ -97,13 +98,15 @@ class Sc20IntegrationTest {
         val traceReader = createTestTraceReader()
         val environmentReader = createTestEnvironmentReader()
         lateinit var scheduler: SimVirtProvisioningService
+        val tracer = EventTracer(clock)
 
         testScope.launch {
             val res = createProvisioner(
                 this,
                 clock,
                 environmentReader,
-                allocationPolicy
+                allocationPolicy,
+                tracer
             )
             val bareMetalProvisioner = res.first
             scheduler = res.second
@@ -145,28 +148,30 @@ class Sc20IntegrationTest {
         assertAll(
             { assertEquals(50, scheduler.submittedVms, "The trace contains 50 VMs") },
             { assertEquals(50, scheduler.finishedVms, "All VMs should finish after a run") },
-            { assertEquals(207379117949, monitor.totalRequestedBurst) },
-            { assertEquals(203388071813, monitor.totalGrantedBurst) },
-            { assertEquals(3991046136, monitor.totalOvercommissionedBurst) },
+            { assertEquals(1684849230562, monitor.totalRequestedBurst) },
+            { assertEquals(447612683996, monitor.totalGrantedBurst) },
+            { assertEquals(1219535757406, monitor.totalOvercommissionedBurst) },
             { assertEquals(0, monitor.totalInterferedBurst) }
         )
     }
 
     @Test
-    fun small() {
+    fun testSmall() {
         val seed = 1
         val chan = Channel<Unit>(Channel.CONFLATED)
         val allocationPolicy = AvailableCoreMemoryAllocationPolicy()
         val traceReader = createTestTraceReader(0.5, seed)
         val environmentReader = createTestEnvironmentReader("single")
         lateinit var scheduler: SimVirtProvisioningService
+        val tracer = EventTracer(clock)
 
         testScope.launch {
             val res = createProvisioner(
                 this,
                 clock,
                 environmentReader,
-                allocationPolicy
+                allocationPolicy,
+                tracer
             )
             scheduler = res.second
 
@@ -190,10 +195,10 @@ class Sc20IntegrationTest {
 
         // Note that these values have been verified beforehand
         assertAll(
-            { assertEquals(96344114723, monitor.totalRequestedBurst) },
-            { assertEquals(96324378235, monitor.totalGrantedBurst) },
-            { assertEquals(19736424, monitor.totalOvercommissionedBurst) },
-            { assertEquals(0, monitor.totalInterferedBurst) }
+            { assertEquals(705128393966, monitor.totalRequestedBurst) { "Total requested work incorrect" } },
+            { assertEquals(173489747029, monitor.totalGrantedBurst) { "Total granted work incorrect" } },
+            { assertEquals(526858997740, monitor.totalOvercommissionedBurst) { "Total overcommitted work incorrect" } },
+            { assertEquals(0, monitor.totalInterferedBurst) { "Total interfered work incorrect" } }
         )
     }