From a3c3d05d8d031d977806c0a7b1166878fa785f16 Mon Sep 17 00:00:00 2001 From: mjkwiatkowski Date: Wed, 10 Jun 2026 21:52:11 +0200 Subject: style: changed figure 1 to something else as suggested by Jesse --- build/main.aux | 5 +- build/main.bbl | 6 ++ build/main.blg | 58 +++++++------- build/main.fdb_latexmk | 23 +++--- build/main.fls | 13 ++- build/main.log | 88 +++++++++------------ build/main.pdf | Bin 1752211 -> 1335356 bytes build/main.synctex.gz | Bin 43064 -> 43388 bytes ...3d6ed-8c41-4f64-a8b6-b85e3f94adb4_3290x2104.png | Bin 0 -> 732242 bytes ...d6ed-8c41-4f64-a8b6-b85e3f94adb4_3290x2104.webp | Bin 0 -> 360576 bytes images/new_fig/arrow-down-svgrepo-com.svg | 6 ++ images/new_fig/figure_1.psd | Bin 0 -> 15423008 bytes images/new_fig/golden-spiral-2037612566.jpg | Bin 0 -> 14602 bytes ...atnam-andhra-pradesh.-1-1536x864-3166751004.jpg | Bin 0 -> 307759 bytes images/new_fig/maxresdefault-2508923618.jpg | Bin 0 -> 294352 bytes images/new_fig/racks_large-786703110.jpg | Bin 0 -> 445296 bytes images/nvidiagpu.png | Bin 0 -> 288706 bytes indent.log | 2 +- main.bib | 11 +++ main.tex | 13 +-- ...lides_Mateusz_Kwiatkowski-20260610-annot-jd.pdf | Bin 0 -> 2195066 bytes notes/meeting3.txt | 49 ++++++++++++ 22 files changed, 167 insertions(+), 107 deletions(-) create mode 100644 images/new_fig/4123d6ed-8c41-4f64-a8b6-b85e3f94adb4_3290x2104.png create mode 100644 images/new_fig/4123d6ed-8c41-4f64-a8b6-b85e3f94adb4_3290x2104.webp create mode 100644 images/new_fig/arrow-down-svgrepo-com.svg create mode 100644 images/new_fig/figure_1.psd create mode 100644 images/new_fig/golden-spiral-2037612566.jpg create mode 100644 images/new_fig/google-signs-87000-crore-deal-to-build-south-asias-biggest-data-center-in-visakhapatnam-andhra-pradesh.-1-1536x864-3166751004.jpg create mode 100644 images/new_fig/maxresdefault-2508923618.jpg create mode 100644 images/new_fig/racks_large-786703110.jpg create mode 100644 images/nvidiagpu.png create mode 100644 notes/VU_BSc_Defense_Slides_Mateusz_Kwiatkowski-20260610-annot-jd.pdf create mode 100644 notes/meeting3.txt diff --git a/build/main.aux b/build/main.aux index 78ebe3c..38b0255 100644 --- a/build/main.aux +++ b/build/main.aux @@ -7,7 +7,7 @@ \citation{DBLP:conf/date/MilojicicFDR21} \citation{DBLP:image/48Microprocessor/Rupp} \citation{DBLP:journals/computer/AthavaleBBMMPS24} -\citation{DBLP:image/48Microprocessor/Rupp} +\citation{Wikipedia:AdaLovelaceArchi} \citation{DBLP:journals/computer/AthavaleBBMMPS24} \@writefile{nav}{\headcommand {\slideentry {0}{0}{2}{2/2}{}{0}}} \@writefile{nav}{\headcommand {\beamer@framepages {2}{2}}} @@ -50,7 +50,8 @@ \bibcite{DBLP:conf/acsos/TalluriOVTI21}{\hyperlink {beamerbibDBLP:conf/acsos/TalluriOVTI21}{12}} \bibcite{DBLP:conf/cirp/TAO2018169}{\hyperlink {beamerbibDBLP:conf/cirp/TAO2018169}{13}} \bibcite{DBLP:conf/sensys/WangZD0TCWZ20}{\hyperlink {beamerbibDBLP:conf/sensys/WangZD0TCWZ20}{14}} -\bibcite{DBLP:conf/noms/ZhangZLZWC22}{\hyperlink {beamerbibDBLP:conf/noms/ZhangZLZWC22}{15}} +\bibcite{Wikipedia:AdaLovelaceArchi}{\hyperlink {beamerbibWikipedia:AdaLovelaceArchi}{15}} +\bibcite{DBLP:conf/noms/ZhangZLZWC22}{\hyperlink {beamerbibDBLP:conf/noms/ZhangZLZWC22}{16}} \@writefile{nav}{\headcommand {\slideentry {0}{0}{10}{10/10}{}{0}}} \@writefile{nav}{\headcommand {\beamer@framepages {10}{10}}} \@writefile{nav}{\headcommand {\slideentry {0}{0}{10}{10/11}{}{0}}} diff --git a/build/main.bbl b/build/main.bbl index 1bc85d5..91827b2 100644 --- a/build/main.bbl +++ b/build/main.bbl @@ -95,6 +95,12 @@ Ruihang Wang, Xin Zhou, Linsen Dong, Yonggang Wen, Rui Tan, Li~Chen, Guan Wang, \newblock In {\em BuildSys '20: The 7th {ACM} International Conference on Systems for Energy-Efficient Buildings, Cities, and Transportation, Virtual Event, Japan, November 18-20, 2020}, pages 200--209. {ACM}, 2020. \newblock \ifshowURL {\showURL \path|https://doi.org/10.1145/3408308.3427982|}\fi. +\bibitem{Wikipedia:AdaLovelaceArchi} +{Wikipedia contributors}. +\newblock Ada lovelace (microarchitecture) --- {Wikipedia}{,} the free encyclopedia. +\newblock \url{ https://en.wikipedia.org/w/index.php?title=Ada_Lovelace_(microarchitecture)&oldid=1353150869 }, 2026. +\newblock [Online; accessed 10-June-2026]. + \bibitem{DBLP:conf/noms/ZhangZLZWC22} Ziting Zhang, Yu~Zeng, Haoran Liu, Chaoyue Zhao, Feng Wang, and Yunqing Chen. \newblock Smart {DC:} an {AI} and digital twin-based energy-saving solution for data centers. diff --git a/build/main.blg b/build/main.blg index cc3d2af..f142293 100644 --- a/build/main.blg +++ b/build/main.blg @@ -6,45 +6,45 @@ Database file #1: main.bib Warning--entry type for "DBLP:image/48Microprocessor/Rupp" isn't style-file defined --line 676 of file main.bib Warning--empty booktitle in DBLP:usdoe/report/AP26894 -You've used 15 entries, +You've used 16 entries, 2588 wiz_defined-function locations, - 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Rupp}, } + +@misc{Wikipedia:AdaLovelaceArchi, + author = "{Wikipedia contributors}", + title = "Ada Lovelace (microarchitecture) --- {Wikipedia}{,} The Free + Encyclopedia", + year = "2026", + howpublished = "\url{ + https://en.wikipedia.org/w/index.php?title=Ada_Lovelace_(microarchitecture)&oldid=1353150869 + }", + note = "[Online; accessed 10-June-2026]", +} diff --git a/main.tex b/main.tex index 7d6ddc5..133df11 100644 --- a/main.tex +++ b/main.tex @@ -6,16 +6,19 @@ \begin{frame}\frametitle{Motivation} \begin{tcolorbox}[title=Context] - Heterogeneous datacenter architectures are common~\cite{DBLP:conf/date/MilojicicFDR21} due to the end of Dennard's scaling~\cite{DBLP:image/48Microprocessor/Rupp}. + Heterogeneous datacenter architectures are common ~\cite{DBLP:conf/date/MilojicicFDR21} due to the end of Dennard's scaling~\cite{DBLP:image/48Microprocessor/Rupp}. Today, computational needs of AI drive managers to diversify datacenters even more~\cite{DBLP:journals/computer/AthavaleBBMMPS24}. In result datacenters become extremely complex and hard to operate. \end{tcolorbox} \begin{minipage}[t]{0.45\linewidth} \tiny - {\centering - \includegraphics[width=1.05\linewidth]{images/48-years-processor-trend-2.pdf} - } - \textbf{Figure 1.1:} 48 years of microprocessor trend data. Legend: \textcolor{Orange}{$\bigblacktriangleup$ Transistors (thousands)}, \textcolor{Blue}{$\lgblkcircle$ Single Thread Performance (SpecINT $\times 10^3$)}, \textcolor{Green}{$\lgblksquare$ Frequency (MHz)}, \textcolor{Maroon}{$\bigblacktriangledown$ Typical Power (Watts)}, $\mdlgblkdiamond$ Number of Logical Cores~\cite{DBLP:image/48Microprocessor/Rupp}. + \begin{center} + \includegraphics[width=0.7\linewidth]{images/nvidiagpu.png} + \end{center} + \vspace{-0.2cm} + \textbf{Figure 1.1:} Nvidia Ada Lovelace AD102 Architecture, present in all GPUs from 2022 onwards~\cite{Wikipedia:AdaLovelaceArchi}. + Source: official renderings by Nvidia. + %\textbf{Figure 1.1:} 48 years of microprocessor trend data. Legend: \textcolor{Orange}{$\bigblacktriangleup$ Transistors (thousands)}, \textcolor{Blue}{$\lgblkcircle$ Single Thread Performance (SpecINT $\times 10^3$)}, \textcolor{Green}{$\lgblksquare$ Frequency (MHz)}, \textcolor{Maroon}{$\bigblacktriangledown$ Typical Power (Watts)}, $\mdlgblkdiamond$ Number of Logical Cores~\cite{DBLP:image/48Microprocessor/Rupp}. \end{minipage} \hspace{0.5cm} \begin{minipage}[t]{0.45\linewidth} diff --git a/notes/VU_BSc_Defense_Slides_Mateusz_Kwiatkowski-20260610-annot-jd.pdf b/notes/VU_BSc_Defense_Slides_Mateusz_Kwiatkowski-20260610-annot-jd.pdf new file mode 100644 index 0000000..4e51e3d Binary files /dev/null and b/notes/VU_BSc_Defense_Slides_Mateusz_Kwiatkowski-20260610-annot-jd.pdf differ diff --git a/notes/meeting3.txt b/notes/meeting3.txt new file mode 100644 index 0000000..f058da1 --- /dev/null +++ b/notes/meeting3.txt @@ -0,0 +1,49 @@ +Jesse -- Latex slides are OK! +1 slides is 1 to 2 minutes - 5 to 10 slides can work. +Slide 4: mention the contributions; In the thesis we answer these RQs, for time limitation, we only focus on RQs 1 and 2. For RQ we do a design and then you can ask me about this after the presentation. +You can skip explaining a RQ. +Skip material instead of cramming material. +As you know and as you've seen in the previous presentations today. + +**Mention societal impact at least verbally. In slide 2.** +Avoid audience members thinking ``he forgot that''. +If you are skipping something -- at least mention that you are skipping it. +Or that there is an extra slide explaining this. + +Before slide 4, the audience must know what predictive analytics is and why is it important to have. +In the `Problem Statement` slide, say `What is predictive analytics`, `Why is it crucial`. +Key for you to explain `What is predictive analytics?` + +Digital Twins -- a lot of elements are shifting about, there are a lot of ways to model these things, and there seems to not be a fully functioning digital twin out there. +There does not exist a system that contains the entire feedback loop. +1) Digital Twins are NOT DONE -- they are actively being developed. +2) Part of being developed is they lack crucial features, e.g., predictive analytics +3) Predictive analytics is this and that... +4) This is important because ... + +You may have to remove the table. + +Slide 2 -- the idea of complex / extremely complex is too bad. +The idea might be a bit too high -- throw in some numbers, the scale of modern datacenters. +Put in some number of different number CPU's, or focus on the number of PETAFLOPS (compute steps per second). + +Change the narrative from Moore's law to something else. +Focus more on the fact that the infrastructure is incredibly large. +DO NOT SHOW THE DENNARD's scaling graph. + +``A single CPU is very complex. (Show ARM Architecture of APPLE MAC) Look, in that something there is this bigger thing, and there is this and there is this bigger thing, and how are we going to simulate this big datacenter, that has so many __layers of complexity__``. A single ARM Architecture Image -- ``This is a complex object''. +In datacenters, there are hundreds of thousands of them. +How do we manage this?'' + +Connect motivation to problem statement via societal context. +``We cannot let these systems go down, we CANNOT Experience failures, we cannot experience performance related issues`'' and that bridges to the need of digital twins to be better able to detect and solve issues in this critical infrastructure. +And that also bridges nicely to predictive analytics. +``What if we can solve problems before they actually occur?`` + +You have to be able to explain something well on a graph with dc <-> dt. +Give a strong motivation for predictive analytics. +Give a strong motivation for failures, or that Digital Twins are just IoT sensors without Digital Twinning. + +Slide 4 add animations to show the research questions. +``Take home message'' instead of Discussion. +Add animations -- to the system model for things appearing. -- cgit v1.2.3